forked from Akcelerometry_drgania_WMT/PI_mikrokontroler
99 lines
5.0 KiB
Markdown
99 lines
5.0 KiB
Markdown
# Pinout ESP32S3
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| **Rysunek 2.** Schemat urządzenia |
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## Kluczowe uwagi
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- Tolerancja 5V: **NIE!** ESP32-S3 nie toleruje logiki 5V, wyłącznie 3.3V
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- DAC: ESP32-S3 nie posiada wbudowanego przetwornika DAC
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- ADC: wszystkie kanały ADC są podłączone do stałych pinów. ADC 2 nie można używać, gdy aktywne jest Wi-Fi.
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## Pinout projektu
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SPI2 (VSPI) | PIN | ADXL345
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* MOSI_ADSX 11 SDA
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* CLK_ADSX 12 SCL
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* MISO_ADSX 13 SD0
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* CS: 9, 10, 14, 21
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SPI3 SD (HSPI) PIN
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* SD_CS 15
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* SD_MISO 16
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* SD_MOSI 17
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* SD_SCK 18
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I2C C3
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* SDA 47
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* SCL 48
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## Bezpieczne piny ESP32 S3
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| **Rysunek 2.** Pinout ESP32 |
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Bezpieczne oznacza, że można je stosować bez ograniczeń. Na inne należy uważać.
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**UWAGA**: część portów GPIO jest współdzielona z FLASH i PSRAM.
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| GPIO | Wejście |Wyjście | Opis |
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|------|----------|--------|-----------------------------------------------------|
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| 0 | pull up | ? | Startup. Btn LOW - download mode |
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| 1 | TX pin | OK | debug output at boot |
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| 2 | OK | OK | on-board LED, LOW to flash |
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| 3 | x | x | Startup |
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| 4 | OK | OK | |
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| 5 | OK | OK | CS1 (Accel1) |
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| 6 | OK | OK | CS2 (Accel2) |
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| 7 | OK | OK | CS3 (Accel3) |
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| 8 | OK | OK | CS4 (Accel4) |
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| 9 | OK | OK | |
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| 10 | OK | OK | BTN1 |
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| 11 | OK | OK | MOSI_ADSX (Accelerometer) |
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| 12 | OK | OK | CLK_ADSX (Accelerometer) |
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| 13 | OK | OK | MISO_ADSX (Accelerometer) |
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| 14 | OK | OK | BTN2 |
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| 15 | OK | OK | SD_CS (SD) |
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| 16 | OK | OK | SD_SCK (HSPI) |
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| 17 | OK | OK | SD_MOSI (HSPI) |
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| 18 | OK | OK | SD_MISO (HSPI) |
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| 19 | x | x | Native USB |
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| 20 | x | x | Native USB |
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| 21 | OK | OK | BTN3 |
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| 22 | OK | OK | |
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| 23 | OK | OK | |
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| 25 | OK | OK | |
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| 26 | x | x | Flash/PSRAM SPICS1 |
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| 27 | x | x | Flash/PSRAM SPIHD |
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| 28 | x | x | Flash/PSRAM SPIWP |
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| 29 | x | x | Flash/PSRAM SPICS0 |
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| 30 | x | x | Flash/PSRAM SPICLK |
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| 31 | x | x | Flash/PSRAM SPIQ |
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| 32 | x | x | Flash/PSRAM SPID |
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| 33 | x | x | SPI PSRAM |
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| 34 | x | x | SPI PSRAM |
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| 35 | x | x | SPI PSRAM |
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| 36 | x | x | SPI PSRAM |
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| 37 | x | x | SPI PSRAM |
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| 39 | x | x | input only PSRAM |
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| 40 | x | x | input only PSRAM |
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| 41 | x | x | input only PSRAM |
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| 42 | x | x | input only PSRAM |
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| 43 | x | x | UART0 TX |
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| 44 | x | x | UART0 RX |
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| 45 | x | x | Pull-Down |
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| 46 | x | x | Pull-Down |
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| 47 | OK | OK | PIN_SDA (LED, RTC) |
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| 48 | OK | OK | PIN_SCL (LED, RTC) |
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| **Rysunek 3.** Mapowanie pinów pomiędzy chipem a Flash i PSRAM |
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[Powrót na stronę główną](../README.md)
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